Hi! My name is Ziyi Yang (æšćæŻ ). I am currently a Ph.D. student at the Microelectronics Thrust, Function Hub of the HKUST(GZ), advised by Prof. Hongce ZHANG. Prior to this, I received my B.Eng in the Department of Electronics and Information Engineering from the China University of Petroleum, Beijing, under the supervision of Prof. Zhou JIN. My research interest is formal verification.
đ„ News
2025.11
One paper accepted by DATE 2026
2025.07
Second Prize in the EDA2 Xiakedao Competition
2025.07
Outstanding Bug-Fixing Team, EDA2 Xiakedao Competition
2024.09
Joined HKUST(GZ) as a Ph.D. student
đ Publications
First-Author Papers
FORWORD: Accelerating Formal Datapath Verification via Word-Level Sweeping
Design, Automation and Test in Europe Conference (DATE), 2026.
Three Challenges in ReRAM-Based Process-In-Memory for Neural Network
IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS), 2023.
Collaborative Papers
IC3-Evolve: Proof-/Witness-Gated Offline LLM-Driven Heuristic Evolution for IC3 Hardware Model Checking
International Joint Conference on Artificial Intelligence (IJCAI), 2026.
Accelerating DC Circuit Simulation through Feature Selection and LSTM-Based Time-Step Control
MDPI Electronics, 2023.
đ Honors and Awards
2025.07
Second Prize in the EDA2 Xiakedao Competition
2025.07
Outstanding Bug-Fixing Team, EDA2 Xiakedao Competition
2024.06
Outstanding Graduate Award
2024.05
Outstanding Individual in Undergraduate Technological Innovation Award
đ Education
2024.06 - now
Ph.D. Student
Hong Kong University of Science and Technology (Guangzhou)
2020.09 - 2024.06
B.Eng.
China University of Petroleum (Beijing)